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authorDenis Chevalier <perso@denischevalier.fr>2026-08-11 01:28:08 +0200
committerDenis Chevalier <perso@denischevalier.fr>2026-08-11 01:28:08 +0200
commit8838b1b39ba61d3359909d0586bfe939bf716be0 (patch)
treed6cbcf84a3d43619cb5de647a1031f993c8b8094
parent233a30f0cc7cfc50deeef7c151d8fac8f7a50f00 (diff)
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same-8838b1b39ba61d3359909d0586bfe939bf716be0.zip
Add header to all typ files
-rw-r--r--charts/capacitor-dielectric-absorption-noise-typical-magnitude.typ19
-rw-r--r--charts/crosstalk-mathematical-model.typ19
-rw-r--r--charts/opamp-voltage-noise-typical-magnitudes.typ19
-rw-r--r--charts/power-supply-noise-coupling-typical-magnitude.typ19
-rw-r--r--diagrams/backplane-connector-diagram.typ19
-rw-r--r--diagrams/cassette-external-dimensions.typ19
-rw-r--r--diagrams/cassette-ventilation.typ19
-rw-r--r--diagrams/chassis-dimensional-requirements.typ19
-rw-r--r--diagrams/db-25-connector-cutout.typ19
-rw-r--r--diagrams/front-panel.typ19
-rw-r--r--diagrams/l-channel-chassis.typ19
-rw-r--r--diagrams/panels-grid.typ19
-rw-r--r--diagrams/u-channel-cover.typ19
-rw-r--r--electrical-specifications.typ19
-rw-r--r--introduction.typ19
-rw-r--r--lib/apply-prefix.typ19
-rw-r--r--lib/assert-aeq.typ19
-rw-r--r--lib/unify.typ19
-rw-r--r--listings/example-calibration-log.typ19
-rw-r--r--mechanical-specifications.typ19
-rw-r--r--module-design.typ19
-rw-r--r--preamble.typ19
-rw-r--r--tables/backplane-connector.typ19
-rw-r--r--tables/capacitor-dielectric-absorption-noise-typical-magnitude.typ19
-rw-r--r--tables/cassette-construction-parameters.typ19
-rw-r--r--tables/cassette-external-dimensions.typ19
-rw-r--r--tables/cassette-internal-dimensions.typ19
-rw-r--r--tables/cassette-ventilation.typ19
-rw-r--r--tables/chassis-capacity.typ19
-rw-r--r--tables/chassis-cassette-rails-geometry.typ19
-rw-r--r--tables/chassis-cassette-rails-retention.typ19
-rw-r--r--tables/chassis-compliance.typ19
-rw-r--r--tables/chassis-cooling-method.typ19
-rw-r--r--tables/chassis-emi-shielding.typ19
-rw-r--r--tables/chassis-front-panel-elements.typ19
-rw-r--r--tables/chassis-grounding.typ19
-rw-r--r--tables/chassis-mains-isolation.typ19
-rw-r--r--tables/chassis-material.typ19
-rw-r--r--tables/chassis-module-interface-dimensions.typ19
-rw-r--r--tables/chassis-ventilation.typ19
-rw-r--r--tables/circuit-and-component-parameters.typ19
-rw-r--r--tables/crosstalk-typical-magnitude.typ19
-rw-r--r--tables/db-25-connector-cutout.typ19
-rw-r--r--tables/drift-rate-derivation.typ19
-rw-r--r--tables/electrical-quantities.typ19
-rw-r--r--tables/error-and-precision-quantities.typ19
-rw-r--r--tables/error-budgeting-introduction.typ19
-rw-r--r--tables/examples-of-error-gates.typ19
-rw-r--r--tables/fundamental-constants.typ19
-rw-r--r--tables/inductor-losses-and-parasitic-effects-typical-magnitude.typ19
-rw-r--r--tables/loading-error.typ2
-rw-r--r--tables/mathematical-operators-and-functions.typ2
-rw-r--r--tables/noise-quantities.typ2
-rw-r--r--tables/opamp-current-noise-typical-magnitude.typ2
-rw-r--r--tables/opamp-voltage-noise-typical-magnitudes.typ2
-rw-r--r--tables/out-of-domain-handling-strategies.typ2
-rw-r--r--tables/panels-geometry.typ2
-rw-r--r--tables/panels-grid-component-placement-rules.typ2
-rw-r--r--tables/panels-grid-origin.typ2
-rw-r--r--tables/panels-grid-positions.typ2
-rw-r--r--tables/panels-jacks-color-coding.typ2
-rw-r--r--tables/panels-labbeling.typ2
-rw-r--r--tables/panels-zones.typ2
-rw-r--r--tables/pcb-board-stackup.typ2
-rw-r--r--tables/pcb-earth-ring-geometry.typ2
-rw-r--r--tables/pcb-electrical-testing-requirements.typ2
-rw-r--r--tables/pcb-ground-planes-agnd-plane.typ2
-rw-r--r--tables/pcb-ground-planes-dgnd-zone.typ2
-rw-r--r--tables/pcb-interconnect-zones-zone-a-pin-assignment.typ2
-rw-r--r--tables/pcb-interconnect-zones-zone-a.typ2
-rw-r--r--tables/pcb-interconnect-zones-zone-b.typ2
-rw-r--r--tables/pcb-keep-out-zones-mounting-holes-keep-out.typ2
-rw-r--r--tables/pcb-keep-out-zones-perimeter-keep-out.typ2
-rw-r--r--tables/pcb-mounting-strategy-mounting-holes-pattern.typ2
-rw-r--r--tables/pcb-mounting-strategy-mounting-holes-positions.typ2
-rw-r--r--tables/pcb-mounting-strategy.typ2
-rw-r--r--tables/pcb-power-planes.typ2
-rw-r--r--tables/pcb-silkscreen-requirements-l1.typ2
-rw-r--r--tables/pcb-silkscreen-requirements-l4.typ2
-rw-r--r--tables/pcb-standard-dimensions.typ2
-rw-r--r--tables/pcb-surface-finish.typ2
-rw-r--r--tables/potentiometer-wiper-noise-and-wear-typical-magnitude.typ2
-rw-r--r--tables/power-distribution-board-functions.typ2
-rw-r--r--tables/power-distribution-board-power-entry.typ2
-rw-r--r--tables/power-supply-noise-coupling-typical-magnitude.typ2
-rw-r--r--tables/precision-measurements-conditions-summary.typ2
-rw-r--r--tables/precision-tiers-summary.typ2
-rw-r--r--tables/protective-earth.typ2
-rw-r--r--tables/selv-circuits.typ2
-rw-r--r--tables/snr-and-noise-floor-resolution.typ2
-rw-r--r--tables/thermal-quantities.typ2
-rw-r--r--tables/time-domain-and-modulation-quantities.typ2
-rw-r--r--tables/unit-prefixes.typ2
-rw-r--r--tables/voltage-and-current-subscript-conventions.typ2
94 files changed, 1038 insertions, 0 deletions
diff --git a/charts/capacitor-dielectric-absorption-noise-typical-magnitude.typ b/charts/capacitor-dielectric-absorption-noise-typical-magnitude.typ
index ae27cb0..ed3de99 100644
--- a/charts/capacitor-dielectric-absorption-noise-typical-magnitude.typ
+++ b/charts/capacitor-dielectric-absorption-noise-typical-magnitude.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty, unit
#import "@preview/cetz:0.5.2"
#import "@preview/cetz-plot:0.1.4": plot
diff --git a/charts/crosstalk-mathematical-model.typ b/charts/crosstalk-mathematical-model.typ
index 0319493..79c8e6f 100644
--- a/charts/crosstalk-mathematical-model.typ
+++ b/charts/crosstalk-mathematical-model.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty, unit
#import "@preview/cetz:0.5.2"
#import "@preview/cetz-plot:0.1.4": plot
diff --git a/charts/opamp-voltage-noise-typical-magnitudes.typ b/charts/opamp-voltage-noise-typical-magnitudes.typ
index 37e926c..e8b1a85 100644
--- a/charts/opamp-voltage-noise-typical-magnitudes.typ
+++ b/charts/opamp-voltage-noise-typical-magnitudes.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty, unit
#import "@preview/cetz:0.5.2"
#import "@preview/cetz-plot:0.1.4": plot
diff --git a/charts/power-supply-noise-coupling-typical-magnitude.typ b/charts/power-supply-noise-coupling-typical-magnitude.typ
index eb29c19..3dc6ac6 100644
--- a/charts/power-supply-noise-coupling-typical-magnitude.typ
+++ b/charts/power-supply-noise-coupling-typical-magnitude.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty, unit
#import "@preview/cetz:0.5.2"
#import "@preview/cetz-plot:0.1.4": plot
diff --git a/diagrams/backplane-connector-diagram.typ b/diagrams/backplane-connector-diagram.typ
index 0b2d254..23d043c 100644
--- a/diagrams/backplane-connector-diagram.typ
+++ b/diagrams/backplane-connector-diagram.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty
#import "@preview/cetz:0.5.2"
diff --git a/diagrams/cassette-external-dimensions.typ b/diagrams/cassette-external-dimensions.typ
index 61b0877..ecb3922 100644
--- a/diagrams/cassette-external-dimensions.typ
+++ b/diagrams/cassette-external-dimensions.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty
#import "@preview/cetz:0.5.2"
diff --git a/diagrams/cassette-ventilation.typ b/diagrams/cassette-ventilation.typ
index c353d4c..e46af40 100644
--- a/diagrams/cassette-ventilation.typ
+++ b/diagrams/cassette-ventilation.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty
#import "@preview/cetz:0.5.2"
diff --git a/diagrams/chassis-dimensional-requirements.typ b/diagrams/chassis-dimensional-requirements.typ
index aa659c2..da556ed 100644
--- a/diagrams/chassis-dimensional-requirements.typ
+++ b/diagrams/chassis-dimensional-requirements.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty
#import "@preview/cetz:0.5.2"
diff --git a/diagrams/db-25-connector-cutout.typ b/diagrams/db-25-connector-cutout.typ
index d8d2bc3..35834cd 100644
--- a/diagrams/db-25-connector-cutout.typ
+++ b/diagrams/db-25-connector-cutout.typ
@@ -1,3 +1,22 @@
+// SAME Analog Modular Ecosystem
+//
+// / SPDX-FileCopyrightText: 2026 Denis Chevalier <perso@denischevalier.fr>
+// / SPDX-License-Identifier: CC-BY-SA-4.0
+// / SPDX-License-Identifier: CERN-OHL-S-2.0+
+// / SPDX-License-Identifier: GPL-3.0-or-later
+//
+// The prose, explanatory text, rendered figures, tables, and mathematical
+// content of this specification are licensed under CC BY-SA 4.0. If a later
+// version of CC BY-SA is published, the author grants permission to distribute
+// this work under that later version as well.
+//
+// Hardware designs contained herein (schematics, PCB layouts, mechanical
+// drawings, and CAD models) are licensed under CERN-OHL-S-2.0+.
+//
+// All executable code, helper libraries (`lib/*`), metrology assertions, and
+// embedded verification scripts throughout the source documents are licensed
+// under the GNU General Public License v3.0 or later (GPL-3.0-or-later).
+
#import "../lib/unify.typ": qty
#import "@preview/cetz:0.5.2"
diff --git a/diagrams/front-panel.typ b/diagrams/front-p