aboutsummaryrefslogtreecommitdiff
AgeCommit message (Expand)AuthorFilesLines
4 hoursfix CONTRIBUTING.mdHEADmainDenis Chevalier1-4/+4
4 hoursUpdate README tree and rename LLM{_,-}POLICY.mdDenis Chevalier3-21/+14
4 hoursadd missing fileDenis Chevalier1-0/+78
4 hoursadd ratio-stability-principle chartDenis Chevalier1-3/+8
5 hoursadd resistor-tempco (start drift sources)Denis Chevalier2-4/+149
14 hoursAdd default vscode configurationDenis Chevalier2-0/+38
14 hourstypo in README.md, add git hook for new typ files SPDX headerDenis Chevalier3-2/+46
14 hoursAdd a nvim local config to automatically insert relevant license information ...Denis Chevalier1-0/+32
14 hoursAdd header to all typ filesDenis Chevalier94-0/+1038
15 hoursAdd LLM policyDenis Chevalier2-0/+77
15 hoursAdd CODE-OF-CONDUCT.mdDenis Chevalier1-0/+81
15 hoursAdd CONTRIBUTING.mdDenis Chevalier1-0/+158
15 hoursAdd README.mdDenis Chevalier1-0/+99
16 hoursupdate licensing to add GPLv3 for codeDenis Chevalier5-6/+1469
16 hourscleaning up and properly typesetting emdashesDenis Chevalier5-9/+16
17 hoursreduce charts samples to 1000 to reduce compile load and ram usageDenis Chevalier4-15/+15
17 hoursrename assert_aeq.typ and apply_prefix.typ s/_/-/Denis Chevalier3-2/+2
17 hoursextract figures in separate filesDenis Chevalier89-4174/+4339
20 hoursreplace chassis module loading svgDenis Chevalier2-908/+483
21 hoursreplace grid svg with cetzDenis Chevalier2-1180/+338
22 hoursreplace db-25 connector cutout svg with cetzDenis Chevalier2-614/+293
22 hoursreplace ventilation svg with cetzDenis Chevalier2-1259/+361
22 hoursreplace front panel geometry with cetz diagramDenis Chevalier2-651/+247
22 hoursswitch u-channel diagram from svg to cetzDenis Chevalier3-1384/+193
23 hourscomplete l-channel diagramDenis Chevalier1-7/+422
23 hoursreplace cassette external dimensions svg with cetz drawingDenis Chevalier2-631/+218
24 hoursgenerate figure 1 (db-25 backplane connector) using cetzDenis Chevalier2-1056/+124
24 hoursformatting, graphs, potentiometer wiper noise and wear, crosstalkDenis Chevalier2-73/+738
30 hoursAdd assertion to check the maths early on, and fix typosDenis Chevalier3-33/+113
32 hoursload add-unit via lib/unify.typ in preambleDenis Chevalier2-2/+2
32 hourspush unify.lib into its own lib subdirectoryDenis Chevalier5-4/+4
32 hoursset per and delimiter parameters globally (curry unify methods)Denis Chevalier5-136/+123
40 hoursinductor losses and parasitic effectsDenis Chevalier1-0/+119
41 hourscapacitor dielectric absorption noise, triboelectric and piezoelectric effect...Denis Chevalier1-83/+282
48 hoursmore shertz and continue error enumerationDenis Chevalier2-26/+248
2 daysadd shertz (square hertz) custom unitDenis Chevalier2-20/+28
2 daysuniformize unit formating with fractions, and range formating with toDenis Chevalier4-73/+88
2 dayscontinue errors enumerationDenis Chevalier2-6/+227
3 daysupdate where it enters for resistor thermal noiseDenis Chevalier1-3/+13
3 daysfix custom units and num for times 10^(-n)$ constructionsDenis Chevalier2-57/+57
3 daysstart error budgeting section and use widely uVrmsDenis Chevalier2-17/+291
3 daysuse @ syntax for refsDenis Chevalier4-24/+24
3 daysfix typosDenis Chevalier1-5/+6
3 dayswrite 4.1 and 4.2Denis Chevalier3-51/+922
3 daysadd module design introductionDenis Chevalier2-1/+99
3 daysfinish mechanical specificationsDenis Chevalier3-0/+1288
3 daysImprove global project (typos, enforce 80 columns whenever possible, diagrams...Denis Chevalier12-66/+7465
4 daysdo not push pdf filesDenis Chevalier2-9587/+1
4 daysadvance on cassette mechanical specificationsDenis Chevalier2-3729/+6232
4 daysStart writing specificationDenis Chevalier5-0/+8313